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Interrupt Module Outline

Coaching Interview 3. Develop a Course OutlineFrom the Job/Task analysis, group content together into chapters and name the chapters."Knowledge" (Concept/Fact/Principle) bubbles map to "Lessons""Procedure" bubbles map to "Lab Exercises" or "Quizzes" or other hands-on activities.Typically, a 1:1 relationship exists between Major Tasks and Chapters. However, you are free to group knowledge and procedures from several different Tasks into the same Chapter in the course outline.When finished, the TTE will produce a course outline in word format that captures this structure.

Interrupt Introduction: Explain the usage and advantages of interrupt.

What is Interrupt?

Example: Main routine interrupted by ISR Handler

Why we need Interrupt in MCU?

Difference between Polling and Interrupt

Advantages of Interrupt over Polling

What kinds of Interrupt are in PIC18?

Introduce Vectored & Non-vectored interrupt

Difference between Vectored & Non-vectored interrupt

Interrupt Hardware overview: Describe the interrupt operation and features

Non-vectored Interrupt Block diagram

Vectored Interrupt Block diagram

Vectored Interrupt Operation

Vectored Interrupt State Transition Diagram

4 Common scenarios of vectored interrupt execution

Vectored Interrupt Block diagram

High/Low-Priority Interrupt While Executing Main Routine

High-Priority Interrupt with a Low-Priority Interrupt Pending

Simultaneous High- and Low-Priority Interrupts

Interrupt Priority Operation

Priority Determination

User Priority

Natural Order Priority

Interrupt Control and Status Register

INTCON0, INTCON1

PIRx

PIEx

IPRx

IVTAD

IVTBASE

IVTLOCK

IVT1WAY, MVECEN

Context Saving Operation

Context Save State Machine Diagram

Shadow Control Register

CPU Registers and saving

Chapter 3

Section 1

Lesson 1

Lab Exercise

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 STATUS

 WREG

 BSR

 FSR0/1/2

 PRODL/H

 PCLATH/U

 Interrupt Latency

 Interrupt latency for MVECEN = 1

 Timing diagram

 Interrupt latency for MVECEN = 0

 Timing diagram

 Aborting Interrupts

 Condition and Execution with examples

 Timing diagram

 IVT Address Calculation

 Case 1: IPEN = 1 & MVECEN = 0

 Case 2: IPEN = X & MVECEN = 1

3. Interrupt Configuration: Show common configuration options using MCC

 Project Creation

 Step1: Choose Standalone Project -> Click Next

 Step2: Choose PIC18F57Q43 in Devices, PKOB nano-SN:xxxxxxxx in Tool -> Click Next

 Step3: Choose XC8 (v2.32) in compiler option -> Click Next

 Step4: Type Project Name -> Click Finish

 Opening MCC using Icon & using tools bar

 Opening MCC using MCC Classic & MCC Melody

 MCC Melody Configuration

 Adding peripherals

o TMR0

o TMR1

o UART1

 Interrupt Module Configuration

o Enable TMR0, TMR1, IOC1 interrupt

o Set TMR1 as High Priority, TMR0 & IOC1 as Low Priority

 Pin Module and Pin Manger Configuration

o Set RB4 IOC option as any

 Clock Control Configuration

o Set System Clock to 1MHz

o Select HFINTOSC in Oscillator Select

o Select 4_MHz in HF Internal Clock

o Select 4 in Clock divider

 Generate MCC Code

 MCC Classic Configuration

 Adding peripherals

o TMR0

o TMR1

o UART1

 Interrupt Module Configuration

o Enable TMR0, TMR1, IOC1 interrupt

o Set TMR1 as High Priority, TMR0 & IOC1 as Low Priority

 Pin Module and Pin Manger Configuration

o Set RB4 IOC option as any

o Enable RC2 Output Option

 System Module Configuration

o Set System Clock to 1MHz

o Select HFINTOSC in Oscillator Select

o Select 4_MHz in HF Internal Clock

o Select 4 in Clock divider

 Generate MCC Code

4. Interrupt Firmware Interface: Describe the MCC generated APIs

 Describe the APIs and how they interface to the MCC generated code

 Describe and explain TMR0, TMR1 ISR Handler

 Describe and explain Main Routine Operation

 Call 4 Demos in UART terminal by typing 1/2/3/4

o 1: High/Low-Priority Interrupt While Executing Main Routine

o 2: High-Priority Interrupt with a Low-Priority Interrupt Pending

o 3: High-Priority Interrupt Preempting Low-Priority Interrupts

o 4: Simultaneous High- and Low-Priority Interrupts

5. Interrupt Demonstration: Show a working design with the configuration options you selected

 Connection Diagram

 With Click board connection

 Without Click board connection

 Hardware Setup

 With Click board setup

 Without Click board setup

 Observe results in MPLAB Data Visualizer

 Demo 1: High/Low-Priority Interrupt While Executing Main Routine

 Demo 2: High-Priority Interrupt with a Low-Priority Interrupt Pending

 Demo 3: High-Priority Interrupt Preempting Low-Priority Interrupts

 Demo 4: Simultaneous High- and Low-Priority Interrupts

6. Interrupt Pitfalls: Show some typical pitfalls using and deploying this peripheral and how you deal with them.

 Enable the Global and Peripheral Interrupts

 Priority Conflict

 Vector table starting address

 ISR Duration

 Atomic Operation

Requirements

Coaching Interview 1. Gather top-level project constraints.Interview SME and sponsor to fill in each of the requested constraints.

Due Date

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Major Job Outcome

What will Attendees be able to produce or accomplish back on the job after taking this training? State it as a noun-phrase, for example:"Customized LoRaWAN demo application using the SAMR34 Module"

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Target Audience

Who are the major audience groups the training is targeted to?Expected background knowledge and experience level?

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Implementation and Delivery Constraints

Course Type (Lecture-Only, Hands-On)?Course Duration (Hours)? Number of instructors required?

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Major Tasks

What are the major engineering tasks required in order to accomplish the Job Outcome?For a Job Outcome of "Custom LoRaWAN demo application using the SAMR34 Module", we could have the following tasks:Evaluate the functional fitness of the SAMR34 for the demo applicationBuild/purchase a hardware prototype for the applicationDownload/Install firmware development toolsWrite and test firmware for the application

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