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MARCO TEÓRICO

- Allows for safe shutdown if peripheral clock stops

• Fail-Safe Clock Monitor:

• Secondary Oscillator using Timer1 @ 32 kHz

- User-tunable to compensate for frequency drift

from 31 kHz to 32 MHz when used with PLL

- Provides a complete range of clock speeds

8 MHz

- 8 use-selectable frequencies, from 31 kHz to

- Fast wake from Sleep and Idle, 1 μs typical

• Internal Oscillator Block:

• Two External Clock modes, up to 40 MHz

• Two External RC modes, up to 4 MHz

and Internal Oscillators

• 4x Phase Lock Loop (PLL) – Available for Crystal

• Four Crystal modes, up to 40 MHz

INTRODUCCIÓN

Configura el módulo del comparador analógico ingresando dos voltajes uno de referencia y otro a comparar donde si el voltaje de la entrada no inversora es mayor a la entrada inversora se obtiene un estado verdadero en la salida del comparador.